Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:13.2 (ISE) - O.61xd Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx9
Project ID (random number) f588f00868f0480eb8e4b89866a19951.acec73d8eafa49c6a0f14d0b978f4630.1 Target Package: tqg144
Registration ID 135256_15690819_173552794_661 Target Speed: -2
Date Generated 2012-05-06T19:23:03 Tool Flow CommandLine
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i3-2310M CPU @ 2.10GHz CPU Speed 2095 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i3-2310M CPU @ 2.10GHz CPU Speed 2095 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=12
  • AGG_IO=12
  • AGG_LOCED_IO=12
  • AGG_SLICE=789
  • NUM_BONDED_IOB=12
  • NUM_BSCAN=1
  • NUM_BSFULL=943
  • NUM_BSLUTONLY=818
  • NUM_BSREGONLY=443
  • NUM_BSUSED=2204
  • NUM_BUFG=2
  • NUM_BUFIO2=1
  • NUM_DPRAM_O5ANDO6=64
  • NUM_DSP48A1=3
  • NUM_ILOGIC2=1
  • NUM_IOB_FF=10
  • NUM_LOCED_IOB=12
  • NUM_LOGIC_O5ANDO6=280
  • NUM_LOGIC_O5ONLY=48
  • NUM_LOGIC_O6ONLY=1270
  • NUM_LUT_RT_DRIVES_CARRY4=4
  • NUM_LUT_RT_DRIVES_FLOP=14
  • NUM_LUT_RT_EXO5=14
  • NUM_LUT_RT_EXO6=2
  • NUM_LUT_RT_O5=6
  • NUM_LUT_RT_O5ANDO6=2
  • NUM_LUT_RT_O6=48
  • NUM_OLOGIC2=9
  • NUM_PLL_ADV=1
  • NUM_RAMB16BWER=4
  • NUM_SLICEL=178
  • NUM_SLICEM=48
  • NUM_SLICEX=563
  • NUM_SLICE_CARRY4=57
  • NUM_SLICE_CONTROLSET=109
  • NUM_SLICE_CYINIT=2230
  • NUM_SLICE_F7MUX=123
  • NUM_SLICE_FF=1451
  • NUM_SLICE_LATCHLOGIC=4
  • NUM_SLICE_UNUSEDCTRL=93
  • NUM_SRL_O5ANDO6=56
  • NUM_SRL_O5ONLY=1
  • NUM_SRL_O6ONLY=24
  • NUM_UNUSABLE_FF_BELS=420
  • Xilinx Core clock_generator_v4_02_a=1
  • Xilinx Core lmb_bram_elaborate_v1_00_a=1
  • Xilinx Core lmb_bram_if_cntlr_v3_00_b=2
  • Xilinx Core lmb_v10_v2_00_b=2
  • Xilinx Core mdm_v2_00_b=1
  • Xilinx Core microblaze_v8_20_a=1
  • Xilinx Core plb_v46_v1_05_a=1
  • Xilinx Core proc_sys_reset_v3_00_a=1
  • Xilinx Core xps_gpio_v2_00_a=1
  • Xilinx Core xps_uartlite_v1_02_a=1
NetStatistics
  • NumNets_Active=2898
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=96
  • NumNodesOfType_Active_BOUNCEIN=460
  • NumNodesOfType_Active_BUFGOUT=2
  • NumNodesOfType_Active_BUFHINP2OUT=15
  • NumNodesOfType_Active_BUFIOINP=1
  • NumNodesOfType_Active_CLKPIN=708
  • NumNodesOfType_Active_CLKPINFEED=22
  • NumNodesOfType_Active_CNTRLPIN=904
  • NumNodesOfType_Active_DOUBLE=5211
  • NumNodesOfType_Active_GENERIC=15
  • NumNodesOfType_Active_GLOBAL=150
  • NumNodesOfType_Active_INPUT=525
  • NumNodesOfType_Active_IOBIN2OUT=12
  • NumNodesOfType_Active_IOBOUTPUT=11
  • NumNodesOfType_Active_LUTINPUT=7876
  • NumNodesOfType_Active_OUTBOUND=2983
  • NumNodesOfType_Active_OUTPUT=2990
  • NumNodesOfType_Active_PADINPUT=9
  • NumNodesOfType_Active_PADOUTPUT=3
  • NumNodesOfType_Active_PINBOUNCE=2258
  • NumNodesOfType_Active_PINFEED=9421
  • NumNodesOfType_Active_PINFEED2=10
  • NumNodesOfType_Active_QUAD=3387
  • NumNodesOfType_Active_REGINPUT=799
  • NumNodesOfType_Active_SINGLE=6243
  • NumNodesOfType_Gnd_BOUNCEACROSS=2
  • NumNodesOfType_Gnd_BOUNCEIN=99
  • NumNodesOfType_Gnd_CLKPIN=1
  • NumNodesOfType_Gnd_CNTRLPIN=4
  • NumNodesOfType_Gnd_DOUBLE=9
  • NumNodesOfType_Gnd_HGNDOUT=55
  • NumNodesOfType_Gnd_INPUT=565
  • NumNodesOfType_Gnd_LUTINPUT=92
  • NumNodesOfType_Gnd_OUTBOUND=27
  • NumNodesOfType_Gnd_OUTPUT=31
  • NumNodesOfType_Gnd_PINBOUNCE=232
  • NumNodesOfType_Gnd_PINFEED=578
  • NumNodesOfType_Gnd_REGINPUT=26
  • NumNodesOfType_Gnd_SINGLE=20
  • NumNodesOfType_Vcc_CLKPIN=2
  • NumNodesOfType_Vcc_CNTRLPIN=8
  • NumNodesOfType_Vcc_HVCCOUT=201
  • NumNodesOfType_Vcc_INPUT=7
  • NumNodesOfType_Vcc_KVCCOUT=39
  • NumNodesOfType_Vcc_LUTINPUT=552
  • NumNodesOfType_Vcc_PINBOUNCE=13
  • NumNodesOfType_Vcc_PINFEED=560
  • NumNodesOfType_Vcc_REGINPUT=4
SiteStatistics
  • BUFG-BUFGMUX=2
  • IOB-IOBM=7
  • IOB-IOBS=5
  • SLICEL-SLICEM=94
  • SLICEX-SLICEL=117
  • SLICEX-SLICEM=102
SiteSummary
  • BSCAN=1
  • BSCAN_BSCAN=1
  • BUFG=2
  • BUFG_BUFG=2
  • BUFIO2=1
  • BUFIO2_BUFIO2=1
  • CARRY4=57
  • DSP48A1=3
  • DSP48A1_DSP48A1=3
  • FF_SR=84
  • HARD0=7
  • HARD1=7
  • ILOGIC2=1
  • ILOGIC2_IFF=1
  • IOB=12
  • IOB_IMUX=3
  • IOB_INBUF=3
  • IOB_OUTBUF=9
  • LUT5=345
  • LUT6=1591
  • LUT_OR_MEM5=126
  • LUT_OR_MEM6=155
  • OLOGIC2=9
  • OLOGIC2_OUTFF=9
  • PAD=12
  • PLL_ADV=1
  • PLL_ADV_PLL_ADV=1
  • RAMB16BWER=4
  • RAMB16BWER_RAMB16BWER=4
  • REG_SR=1371
  • SELMUX2_1=124
  • SLICEL=178
  • SLICEM=48
  • SLICEX=563
 
Configuration Data
BSCAN_BSCAN
  • JTAG_CHAIN=[2:1]
  • JTAG_TEST=[0:1]
BUFIO2_BUFIO2
  • DIVIDE=[1:1]
  • DIVIDE_BYPASS=[TRUE:1]
  • I_INVERT=[FALSE:1]
DSP48A1
  • CEA=[CEA_INV:0] [CEA:3]
  • CEB=[CEB_INV:0] [CEB:3]
  • CEC=[CEC:3] [CEC_INV:0]
  • CECARRYIN=[CECARRYIN_INV:0] [CECARRYIN:3]
  • CED=[CED_INV:0] [CED:3]
  • CEM=[CEM_INV:0] [CEM:3]
  • CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:3]
  • CEP=[CEP:3] [CEP_INV:0]
  • CLK=[CLK:3] [CLK_INV:0]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTB=[RSTB:3] [RSTB_INV:0]
  • RSTC=[RSTC_INV:0] [RSTC:3]
  • RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:3]
  • RSTD=[RSTD_INV:0] [RSTD:3]
  • RSTM=[RSTM:3] [RSTM_INV:0]
  • RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:3]
  • RSTP=[RSTP_INV:0] [RSTP:3]
DSP48A1_DSP48A1
  • A0REG=[0:2] [1:1]
  • A1REG=[0:3]
  • B0REG=[0:2] [1:1]
  • B1REG=[0:3]
  • B_INPUT=[DIRECT:3]
  • CARRYINREG=[0:3]
  • CARRYINSEL=[OPMODE5:3]
  • CARRYOUTREG=[0:3]
  • CEA=[CEA_INV:0] [CEA:3]
  • CEB=[CEB_INV:0] [CEB:3]
  • CEC=[CEC:3] [CEC_INV:0]
  • CECARRYIN=[CECARRYIN_INV:0] [CECARRYIN:3]
  • CED=[CED_INV:0] [CED:3]
  • CEM=[CEM_INV:0] [CEM:3]
  • CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:3]
  • CEP=[CEP:3] [CEP_INV:0]
  • CLK=[CLK:3] [CLK_INV:0]
  • CREG=[0:3]
  • DREG=[0:3]
  • MREG=[0:1] [1:2]
  • OPMODEREG=[0:3]
  • PREG=[0:1] [1:2]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTB=[RSTB:3] [RSTB_INV:0]
  • RSTC=[RSTC_INV:0] [RSTC:3]
  • RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:3]
  • RSTD=[RSTD_INV:0] [RSTD:3]
  • RSTM=[RSTM:3] [RSTM_INV:0]
  • RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:3]
  • RSTP=[RSTP_INV:0] [RSTP:3]
  • RSTTYPE=[SYNC:3]
FF_SR
  • CK=[CK:84] [CK_INV:0]
  • SRINIT=[SRINIT0:77] [SRINIT1:7]
  • SYNC_ATTR=[ASYNC:19] [SYNC:65]
ILOGIC2
  • CLK0=[CLK0_INV:0] [CLK0:1]
ILOGIC2_IFF
  • CLK0=[CLK0_INV:0] [CLK0:1]
  • IFFTYPE=[FF:1]
  • SRINIT_Q=[1:1]
  • SRTYPE_Q=[SYNC:1]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:9]
  • SLEW=[SLOW:9]
  • SUSPEND=[3STATE:9]
LUT_OR_MEM5
  • CLK=[CLK:121] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:5] [RAM:121]
  • RAMMODE=[SRL16:57] [DPRAM32:64]
LUT_OR_MEM6
  • CLK=[CLK:144] [CLK_INV:0]
  • LUT_OR_MEM=[LUT:11] [RAM:144]
  • RAMMODE=[SRL16:80] [DPRAM32:64]
OLOGIC2
  • CLK0=[CLK0_INV:0] [CLK0:9]
OLOGIC2_OUTFF
  • CK0=[CK0_INV:0] [CK0:9]
  • OUTFFTYPE=[FF:9]
  • SRINIT_OQ=[0:8] [1:1]
  • SRTYPE_OQ=[SYNC:9]
PLL_ADV
  • RST=[RST:0] [RST_INV:1]
PLL_ADV_PLL_ADV
  • BANDWIDTH=[OPTIMIZED:1]
  • CLK_FEEDBACK=[CLKFBOUT:1]
  • COMPENSATION=[INTERNAL:1]
  • PLL_ADD_LEAKAGE=[2:1]
  • PLL_AVDD_COMP_SET=[2:1]
  • PLL_CLAMP_BYPASS=[FALSE:1]
  • PLL_CLAMP_REF_SEL=[1:1]
  • PLL_CLK0MX=[0:1]
  • PLL_CLK1MX=[0:1]
  • PLL_CLK2MX=[0:1]
  • PLL_CLK3MX=[0:1]
  • PLL_CLK4MX=[0:1]
  • PLL_CLK5MX=[0:1]
  • PLL_CLKBURST_CNT=[0:1]
  • PLL_CLKBURST_ENABLE=[TRUE:1]
  • PLL_CLKCNTRL=[0:1]
  • PLL_CLKFBMX=[0:1]
  • PLL_CLKFBOUT2_EDGE=[TRUE:1]
  • PLL_CLKFBOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKFBOUT_EDGE=[TRUE:1]
  • PLL_CLKFBOUT_EN=[FALSE:1]
  • PLL_CLKFBOUT_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT0_EDGE=[TRUE:1]
  • PLL_CLKOUT0_EN=[FALSE:1]
  • PLL_CLKOUT0_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT1_EDGE=[TRUE:1]
  • PLL_CLKOUT1_EN=[FALSE:1]
  • PLL_CLKOUT1_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT2_EDGE=[TRUE:1]
  • PLL_CLKOUT2_EN=[FALSE:1]
  • PLL_CLKOUT2_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT3_EDGE=[TRUE:1]
  • PLL_CLKOUT3_EN=[FALSE:1]
  • PLL_CLKOUT3_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT4_EDGE=[TRUE:1]
  • PLL_CLKOUT4_EN=[FALSE:1]
  • PLL_CLKOUT4_NOCOUNT=[TRUE:1]
  • PLL_CLKOUT5_EDGE=[TRUE:1]
  • PLL_CLKOUT5_EN=[FALSE:1]
  • PLL_CLKOUT5_NOCOUNT=[TRUE:1]
  • PLL_CLK_LOST_DETECT=[FALSE:1]
  • PLL_CP=[1:1]
  • PLL_CP_BIAS_TRIP_SHIFT=[TRUE:1]
  • PLL_CP_REPL=[1:1]
  • PLL_CP_RES=[0:1]
  • PLL_DIRECT_PATH_CNTRL=[TRUE:1]
  • PLL_DIVCLK_EDGE=[TRUE:1]
  • PLL_DIVCLK_NOCOUNT=[TRUE:1]
  • PLL_DVDD_COMP_SET=[2:1]
  • PLL_EN=[FALSE:1]
  • PLL_EN_DLY=[TRUE:1]
  • PLL_EN_LEAKAGE=[2:1]
  • PLL_EN_TCLK0=[TRUE:1]
  • PLL_EN_TCLK1=[TRUE:1]
  • PLL_EN_TCLK2=[TRUE:1]
  • PLL_EN_TCLK3=[TRUE:1]
  • PLL_EN_VCO0=[FALSE:1]
  • PLL_EN_VCO1=[FALSE:1]
  • PLL_EN_VCO2=[FALSE:1]
  • PLL_EN_VCO3=[FALSE:1]
  • PLL_EN_VCO4=[FALSE:1]
  • PLL_EN_VCO5=[FALSE:1]
  • PLL_EN_VCO6=[FALSE:1]
  • PLL_EN_VCO7=[FALSE:1]
  • PLL_EN_VCO_DIV1=[FALSE:1]
  • PLL_EN_VCO_DIV6=[TRUE:1]
  • PLL_INTFB=[0:1]
  • PLL_IO_CLKSRC=[0:1]
  • PLL_LFHF=[3:1]
  • PLL_LOCK_FB_DLY=[3:1]
  • PLL_LOCK_REF_DLY=[5:1]
  • PLL_MAN_LF_EN=[TRUE:1]
  • PLL_NBTI_EN=[TRUE:1]
  • PLL_PFD_CNTRL=[8:1]
  • PLL_PFD_DLY=[1:1]
  • PLL_PWRD_CFG=[FALSE:1]
  • PLL_REG_INPUT=[TRUE:1]
  • PLL_RES=[1:1]
  • PLL_SEL_SLIPD=[FALSE:1]
  • PLL_SKEW_CNTRL=[0:1]
  • PLL_TEST_IN_WINDOW=[FALSE:1]
  • PLL_VDD_SEL=[0:1]
  • PLL_VLFHIGH_DIS=[TRUE:1]
  • RST=[RST:0] [RST_INV:1]
RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:4]
  • CLKB=[CLKB_INV:0] [CLKB:4]
  • ENA=[ENA_INV:0] [ENA:4]
  • ENB=[ENB_INV:0] [ENB:4]
  • REGCEA=[REGCEA_INV:0] [REGCEA:4]
  • REGCEB=[REGCEB_INV:0] [REGCEB:4]
  • RSTA=[RSTA:4] [RSTA_INV:0]
  • RSTB=[RSTB:4] [RSTB_INV:0]
  • WEA0=[WEA0:4] [WEA0_INV:0]
  • WEA1=[WEA1:4] [WEA1_INV:0]
  • WEA2=[WEA2:4] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:4]
  • WEB0=[WEB0:4] [WEB0_INV:0]
  • WEB1=[WEB1:4] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:4]
  • WEB3=[WEB3:4] [WEB3_INV:0]
RAMB16BWER_RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:4]
  • CLKB=[CLKB_INV:0] [CLKB:4]
  • DATA_WIDTH_A=[9:4]
  • DATA_WIDTH_B=[9:4]
  • DOA_REG=[0:4]
  • DOB_REG=[0:4]
  • ENA=[ENA_INV:0] [ENA:4]
  • ENB=[ENB_INV:0] [ENB:4]
  • EN_RSTRAM_A=[TRUE:4]
  • EN_RSTRAM_B=[TRUE:4]
  • RAM_MODE=[TDP:4]
  • REGCEA=[REGCEA_INV:0] [REGCEA:4]
  • REGCEB=[REGCEB_INV:0] [REGCEB:4]
  • RSTA=[RSTA:4] [RSTA_INV:0]
  • RSTB=[RSTB:4] [RSTB_INV:0]
  • RSTTYPE=[SYNC:4]
  • RST_PRIORITY_A=[CE:4]
  • RST_PRIORITY_B=[CE:4]
  • WEA0=[WEA0:4] [WEA0_INV:0]
  • WEA1=[WEA1:4] [WEA1_INV:0]
  • WEA2=[WEA2:4] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:4]
  • WEB0=[WEB0:4] [WEB0_INV:0]
  • WEB1=[WEB1:4] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:4]
  • WEB3=[WEB3:4] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:4]
  • WRITE_MODE_B=[WRITE_FIRST:4]
REG_SR
  • CK=[CK:1353] [CK_INV:18]
  • LATCH_OR_FF=[FF:1367] [AND2L:4]
  • SRINIT=[SRINIT0:1288] [SRINIT1:83]
  • SYNC_ATTR=[ASYNC:373] [SYNC:998]
SLICEL
  • CLK=[CLK:154] [CLK_INV:2]
SLICEM
  • CLK=[CLK:48] [CLK_INV:0]
SLICEX
  • CLK=[CLK:487] [CLK_INV:5]
 
Pin Data
BSCAN
  • CAPTURE=1
  • DRCK=1
  • SEL=1
  • SHIFT=1
  • TDI=1
  • TDO=1
  • UPDATE=1
BSCAN_BSCAN
  • CAPTURE=1
  • DRCK=1
  • SEL=1
  • SHIFT=1
  • TDI=1
  • TDO=1
  • UPDATE=1
BUFG
  • I0=2
  • O=2
BUFG_BUFG
  • I0=2
  • O=2
BUFIO2
  • DIVCLK=1
  • I=1
BUFIO2_BUFIO2
  • DIVCLK=1
  • I=1
CARRY4
  • CIN=37
  • CO0=2
  • CO1=1
  • CO2=8
  • CO3=44
  • CYINIT=20
  • DI0=49
  • DI1=47
  • DI2=45
  • DI3=41
  • O0=34
  • O1=32
  • O2=32
  • O3=33
  • S0=57
  • S1=51
  • S2=51
  • S3=48
DSP48A1
  • A0=3
  • A1=3
  • A10=3
  • A11=3
  • A12=3
  • A13=3
  • A14=3
  • A15=3
  • A16=3
  • A17=3
  • A2=3
  • A3=3
  • A4=3
  • A5=3
  • A6=3
  • A7=3
  • A8=3
  • A9=3
  • B0=3
  • B1=3
  • B10=3
  • B11=3
  • B12=3
  • B13=3
  • B14=3
  • B15=3
  • B16=3
  • B17=3
  • B2=3
  • B3=3
  • B4=3
  • B5=3
  • B6=3
  • B7=3
  • B8=3
  • B9=3
  • C0=3
  • C1=3
  • C10=3
  • C11=3
  • C12=3
  • C13=3
  • C14=3
  • C15=3
  • C16=3
  • C17=3
  • C18=3
  • C19=3
  • C2=3
  • C20=3
  • C21=3
  • C22=3
  • C23=3
  • C24=3
  • C25=3
  • C26=3
  • C27=3
  • C28=3
  • C29=3
  • C3=3
  • C30=3
  • C31=3
  • C32=3
  • C33=3
  • C34=3
  • C35=3
  • C36=3
  • C37=3
  • C38=3
  • C39=3
  • C4=3
  • C40=3
  • C41=3
  • C42=3
  • C43=3
  • C44=3
  • C45=3
  • C46=3
  • C47=3
  • C5=3
  • C6=3
  • C7=3
  • C8=3
  • C9=3
  • CEA=3
  • CEB=3
  • CEC=3
  • CECARRYIN=3
  • CED=3
  • CEM=3
  • CEOPMODE=3
  • CEP=3
  • CLK=3
  • D0=3
  • D1=3
  • D10=3
  • D11=3
  • D12=3
  • D13=3
  • D14=3
  • D15=3
  • D16=3
  • D17=3
  • D2=3
  • D3=3
  • D4=3
  • D5=3
  • D6=3
  • D7=3
  • D8=3
  • D9=3
  • OPMODE0=3
  • OPMODE1=3
  • OPMODE2=3
  • OPMODE3=3
  • OPMODE4=3
  • OPMODE5=3
  • OPMODE6=3
  • OPMODE7=3
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=1
  • P16=1
  • P17=1
  • P18=1
  • P19=1
  • P2=2
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • P25=1
  • P26=1
  • P27=1
  • P28=1
  • P29=1
  • P3=2
  • P30=1
  • P31=1
  • P32=1
  • P33=1
  • P34=1
  • P35=1
  • P36=1
  • P37=1
  • P38=1
  • P39=1
  • P4=2
  • P40=1
  • P41=1
  • P42=1
  • P43=1
  • P44=1
  • P45=1
  • P46=1
  • P47=1
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • PCIN0=1
  • PCIN1=1
  • PCIN10=1
  • PCIN11=1
  • PCIN12=1
  • PCIN13=1
  • PCIN14=1
  • PCIN15=1
  • PCIN16=1
  • PCIN17=1
  • PCIN18=1
  • PCIN19=1
  • PCIN2=1
  • PCIN20=1
  • PCIN21=1
  • PCIN22=1
  • PCIN23=1
  • PCIN24=1
  • PCIN25=1
  • PCIN26=1
  • PCIN27=1
  • PCIN28=1
  • PCIN29=1
  • PCIN3=1
  • PCIN30=1
  • PCIN31=1
  • PCIN32=1
  • PCIN33=1
  • PCIN34=1
  • PCIN35=1
  • PCIN36=1
  • PCIN37=1
  • PCIN38=1
  • PCIN39=1
  • PCIN4=1
  • PCIN40=1
  • PCIN41=1
  • PCIN42=1
  • PCIN43=1
  • PCIN44=1
  • PCIN45=1
  • PCIN46=1
  • PCIN47=1
  • PCIN5=1
  • PCIN6=1
  • PCIN7=1
  • PCIN8=1
  • PCIN9=1
  • PCOUT0=1
  • PCOUT1=1
  • PCOUT10=1
  • PCOUT11=1
  • PCOUT12=1
  • PCOUT13=1
  • PCOUT14=1
  • PCOUT15=1
  • PCOUT16=1
  • PCOUT17=1
  • PCOUT18=1
  • PCOUT19=1
  • PCOUT2=1
  • PCOUT20=1
  • PCOUT21=1
  • PCOUT22=1
  • PCOUT23=1
  • PCOUT24=1
  • PCOUT25=1
  • PCOUT26=1
  • PCOUT27=1
  • PCOUT28=1
  • PCOUT29=1
  • PCOUT3=1
  • PCOUT30=1
  • PCOUT31=1
  • PCOUT32=1
  • PCOUT33=1
  • PCOUT34=1
  • PCOUT35=1
  • PCOUT36=1
  • PCOUT37=1
  • PCOUT38=1
  • PCOUT39=1
  • PCOUT4=1
  • PCOUT40=1
  • PCOUT41=1
  • PCOUT42=1
  • PCOUT43=1
  • PCOUT44=1
  • PCOUT45=1
  • PCOUT46=1
  • PCOUT47=1
  • PCOUT5=1
  • PCOUT6=1
  • PCOUT7=1
  • PCOUT8=1
  • PCOUT9=1
  • RSTA=3
  • RSTB=3
  • RSTC=3
  • RSTCARRYIN=3
  • RSTD=3
  • RSTM=3
  • RSTOPMODE=3
  • RSTP=3
DSP48A1_DSP48A1
  • A0=3
  • A1=3
  • A10=3
  • A11=3
  • A12=3
  • A13=3
  • A14=3
  • A15=3
  • A16=3
  • A17=3
  • A2=3
  • A3=3
  • A4=3
  • A5=3
  • A6=3
  • A7=3
  • A8=3
  • A9=3
  • B0=3
  • B1=3
  • B10=3
  • B11=3
  • B12=3
  • B13=3
  • B14=3
  • B15=3
  • B16=3
  • B17=3
  • B2=3
  • B3=3
  • B4=3
  • B5=3
  • B6=3
  • B7=3
  • B8=3
  • B9=3
  • C0=3
  • C1=3
  • C10=3
  • C11=3
  • C12=3
  • C13=3
  • C14=3
  • C15=3
  • C16=3
  • C17=3
  • C18=3
  • C19=3
  • C2=3
  • C20=3
  • C21=3
  • C22=3
  • C23=3
  • C24=3
  • C25=3
  • C26=3
  • C27=3
  • C28=3
  • C29=3
  • C3=3
  • C30=3
  • C31=3
  • C32=3
  • C33=3
  • C34=3
  • C35=3
  • C36=3
  • C37=3
  • C38=3
  • C39=3
  • C4=3
  • C40=3
  • C41=3
  • C42=3
  • C43=3
  • C44=3
  • C45=3
  • C46=3
  • C47=3
  • C5=3
  • C6=3
  • C7=3
  • C8=3
  • C9=3
  • CEA=3
  • CEB=3
  • CEC=3
  • CECARRYIN=3
  • CED=3
  • CEM=3
  • CEOPMODE=3
  • CEP=3
  • CLK=3
  • D0=3
  • D1=3
  • D10=3
  • D11=3
  • D12=3
  • D13=3
  • D14=3
  • D15=3
  • D16=3
  • D17=3
  • D2=3
  • D3=3
  • D4=3
  • D5=3
  • D6=3
  • D7=3
  • D8=3
  • D9=3
  • OPMODE0=3
  • OPMODE1=3
  • OPMODE2=3
  • OPMODE3=3
  • OPMODE4=3
  • OPMODE5=3
  • OPMODE6=3
  • OPMODE7=3
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=1
  • P16=1
  • P17=1
  • P18=1
  • P19=1
  • P2=2
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • P25=1
  • P26=1
  • P27=1
  • P28=1
  • P29=1
  • P3=2
  • P30=1
  • P31=1
  • P32=1
  • P33=1
  • P34=1
  • P35=1
  • P36=1
  • P37=1
  • P38=1
  • P39=1
  • P4=2
  • P40=1
  • P41=1
  • P42=1
  • P43=1
  • P44=1
  • P45=1
  • P46=1
  • P47=1
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • PCIN0=1
  • PCIN1=1
  • PCIN10=1
  • PCIN11=1
  • PCIN12=1
  • PCIN13=1
  • PCIN14=1
  • PCIN15=1
  • PCIN16=1
  • PCIN17=1
  • PCIN18=1
  • PCIN19=1
  • PCIN2=1
  • PCIN20=1
  • PCIN21=1
  • PCIN22=1
  • PCIN23=1
  • PCIN24=1
  • PCIN25=1
  • PCIN26=1
  • PCIN27=1
  • PCIN28=1
  • PCIN29=1
  • PCIN3=1
  • PCIN30=1
  • PCIN31=1
  • PCIN32=1
  • PCIN33=1
  • PCIN34=1
  • PCIN35=1
  • PCIN36=1
  • PCIN37=1
  • PCIN38=1
  • PCIN39=1
  • PCIN4=1
  • PCIN40=1
  • PCIN41=1
  • PCIN42=1
  • PCIN43=1
  • PCIN44=1
  • PCIN45=1
  • PCIN46=1
  • PCIN47=1
  • PCIN5=1
  • PCIN6=1
  • PCIN7=1
  • PCIN8=1
  • PCIN9=1
  • PCOUT0=1
  • PCOUT1=1
  • PCOUT10=1
  • PCOUT11=1
  • PCOUT12=1
  • PCOUT13=1
  • PCOUT14=1
  • PCOUT15=1
  • PCOUT16=1
  • PCOUT17=1
  • PCOUT18=1
  • PCOUT19=1
  • PCOUT2=1
  • PCOUT20=1
  • PCOUT21=1
  • PCOUT22=1
  • PCOUT23=1
  • PCOUT24=1
  • PCOUT25=1
  • PCOUT26=1
  • PCOUT27=1
  • PCOUT28=1
  • PCOUT29=1
  • PCOUT3=1
  • PCOUT30=1
  • PCOUT31=1
  • PCOUT32=1
  • PCOUT33=1
  • PCOUT34=1
  • PCOUT35=1
  • PCOUT36=1
  • PCOUT37=1
  • PCOUT38=1
  • PCOUT39=1
  • PCOUT4=1
  • PCOUT40=1
  • PCOUT41=1
  • PCOUT42=1
  • PCOUT43=1
  • PCOUT44=1
  • PCOUT45=1
  • PCOUT46=1
  • PCOUT47=1
  • PCOUT5=1
  • PCOUT6=1
  • PCOUT7=1
  • PCOUT8=1
  • PCOUT9=1
  • RSTA=3
  • RSTB=3
  • RSTC=3
  • RSTCARRYIN=3
  • RSTD=3
  • RSTM=3
  • RSTOPMODE=3
  • RSTP=3
FF_SR
  • CE=52
  • CK=84
  • D=84
  • Q=84
  • SR=66
HARD0
  • 0=7
HARD1
  • 1=7
ILOGIC2
  • CLK0=1
  • D=1
  • Q4=1
  • SR=1
ILOGIC2_IFF
  • CLK0=1
  • D=1
  • Q1=1
  • SR=1
IOB
  • I=3
  • O=9
  • PAD=12
IOB_IMUX
  • I=3
  • OUT=3
IOB_INBUF
  • OUT=3
  • PAD=3
IOB_OUTBUF
  • IN=9
  • OUT=9
LUT5
  • A1=166
  • A2=208
  • A3=180
  • A4=130
  • A5=128
  • O5=345
LUT6
  • A1=638
  • A2=984
  • A3=1195
  • A4=1443
  • A5=1533
  • A6=1566
  • O6=1591
LUT_OR_MEM5
  • A1=123
  • A2=122
  • A3=121
  • A4=123
  • A5=122
  • CLK=121
  • DI1=121
  • O5=126
  • WA1=64
  • WA2=64
  • WA3=64
  • WA4=64
  • WA5=64
  • WE=121
LUT_OR_MEM6
  • A1=145
  • A2=148
  • A3=149
  • A4=150
  • A5=155
  • A6=155
  • CLK=144
  • DI2=144
  • MC31=7
  • O6=139
  • WA1=64
  • WA2=64
  • WA3=64
  • WA4=64
  • WA5=64
  • WA6=64
  • WE=144
OLOGIC2
  • CLK0=9
  • D1=9
  • OCE=8
  • OQ=9
  • SR=9
OLOGIC2_OUTFF
  • CE=8
  • CK0=9
  • D1=9
  • Q=9
  • SR=9
PAD
  • PAD=12
PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKOUT0=1
  • DADDR0=1
  • DADDR1=1
  • DADDR2=1
  • DADDR3=1
  • DADDR4=1
  • DCLK=1
  • DEN=1
  • DI0=1
  • DI1=1
  • DI10=1
  • DI11=1
  • DI12=1
  • DI13=1
  • DI14=1
  • DI15=1
  • DI2=1
  • DI3=1
  • DI4=1
  • DI5=1
  • DI6=1
  • DI7=1
  • DI8=1
  • DI9=1
  • DWE=1
  • LOCKED=1
  • RST=1
PLL_ADV_PLL_ADV
  • CLKFBIN=1
  • CLKFBOUT=1
  • CLKIN1=1
  • CLKOUT0=1
  • DADDR0=1
  • DADDR1=1
  • DADDR2=1
  • DADDR3=1
  • DADDR4=1
  • DCLK=1
  • DEN=1
  • DI0=1
  • DI1=1
  • DI10=1
  • DI11=1
  • DI12=1
  • DI13=1
  • DI14=1
  • DI15=1
  • DI2=1
  • DI3=1
  • DI4=1
  • DI5=1
  • DI6=1
  • DI7=1
  • DI8=1
  • DI9=1
  • DWE=1
  • LOCKED=1
  • RST=1
RAMB16BWER
  • ADDRA0=4
  • ADDRA1=4
  • ADDRA10=4
  • ADDRA11=4
  • ADDRA12=4
  • ADDRA13=4
  • ADDRA2=4
  • ADDRA3=4
  • ADDRA4=4
  • ADDRA5=4
  • ADDRA6=4
  • ADDRA7=4
  • ADDRA8=4
  • ADDRA9=4
  • ADDRB0=4
  • ADDRB1=4
  • ADDRB10=4
  • ADDRB11=4
  • ADDRB12=4
  • ADDRB13=4
  • ADDRB2=4
  • ADDRB3=4
  • ADDRB4=4
  • ADDRB5=4
  • ADDRB6=4
  • ADDRB7=4
  • ADDRB8=4
  • ADDRB9=4
  • CLKA=4
  • CLKB=4
  • DIA0=4
  • DIA1=4
  • DIA10=4
  • DIA11=4
  • DIA12=4
  • DIA13=4
  • DIA14=4
  • DIA15=4
  • DIA16=4
  • DIA17=4
  • DIA18=4
  • DIA19=4
  • DIA2=4
  • DIA20=4
  • DIA21=4
  • DIA22=4
  • DIA23=4
  • DIA24=4
  • DIA25=4
  • DIA26=4
  • DIA27=4
  • DIA28=4
  • DIA29=4
  • DIA3=4
  • DIA30=4
  • DIA31=4
  • DIA4=4
  • DIA5=4
  • DIA6=4
  • DIA7=4
  • DIA8=4
  • DIA9=4
  • DIB0=4
  • DIB1=4
  • DIB10=4
  • DIB11=4
  • DIB12=4
  • DIB13=4
  • DIB14=4
  • DIB15=4
  • DIB16=4
  • DIB17=4
  • DIB18=4
  • DIB19=4
  • DIB2=4
  • DIB20=4
  • DIB21=4
  • DIB22=4
  • DIB23=4
  • DIB24=4
  • DIB25=4
  • DIB26=4
  • DIB27=4
  • DIB28=4
  • DIB29=4
  • DIB3=4
  • DIB30=4
  • DIB31=4
  • DIB4=4
  • DIB5=4
  • DIB6=4
  • DIB7=4
  • DIB8=4
  • DIB9=4
  • DIPA0=4
  • DIPA1=4
  • DIPA2=4
  • DIPA3=4
  • DIPB0=4
  • DIPB1=4
  • DIPB2=4
  • DIPB3=4
  • DOA0=4
  • DOA1=4
  • DOA2=4
  • DOA3=4
  • DOA4=4
  • DOA5=4
  • DOA6=4
  • DOA7=4
  • DOB0=4
  • DOB1=4
  • DOB2=4
  • DOB3=4
  • DOB4=4
  • DOB5=4
  • DOB6=4
  • DOB7=4
  • ENA=4
  • ENB=4
  • REGCEA=4
  • REGCEB=4
  • RSTA=4
  • RSTB=4
  • WEA0=4
  • WEA1=4
  • WEA2=4
  • WEA3=4
  • WEB0=4
  • WEB1=4
  • WEB2=4
  • WEB3=4
RAMB16BWER_RAMB16BWER
  • ADDRA0=4
  • ADDRA1=4
  • ADDRA10=4
  • ADDRA11=4
  • ADDRA12=4
  • ADDRA13=4
  • ADDRA2=4
  • ADDRA3=4
  • ADDRA4=4
  • ADDRA5=4
  • ADDRA6=4
  • ADDRA7=4
  • ADDRA8=4
  • ADDRA9=4
  • ADDRB0=4
  • ADDRB1=4
  • ADDRB10=4
  • ADDRB11=4
  • ADDRB12=4
  • ADDRB13=4
  • ADDRB2=4
  • ADDRB3=4
  • ADDRB4=4
  • ADDRB5=4
  • ADDRB6=4
  • ADDRB7=4
  • ADDRB8=4
  • ADDRB9=4
  • CLKA=4
  • CLKB=4
  • DIA0=4
  • DIA1=4
  • DIA10=4
  • DIA11=4
  • DIA12=4
  • DIA13=4
  • DIA14=4
  • DIA15=4
  • DIA16=4
  • DIA17=4
  • DIA18=4
  • DIA19=4
  • DIA2=4
  • DIA20=4
  • DIA21=4
  • DIA22=4
  • DIA23=4
  • DIA24=4
  • DIA25=4
  • DIA26=4
  • DIA27=4
  • DIA28=4
  • DIA29=4
  • DIA3=4
  • DIA30=4
  • DIA31=4
  • DIA4=4
  • DIA5=4
  • DIA6=4
  • DIA7=4
  • DIA8=4
  • DIA9=4
  • DIB0=4
  • DIB1=4
  • DIB10=4
  • DIB11=4
  • DIB12=4
  • DIB13=4
  • DIB14=4
  • DIB15=4
  • DIB16=4
  • DIB17=4
  • DIB18=4
  • DIB19=4
  • DIB2=4
  • DIB20=4
  • DIB21=4
  • DIB22=4
  • DIB23=4
  • DIB24=4
  • DIB25=4
  • DIB26=4
  • DIB27=4
  • DIB28=4
  • DIB29=4
  • DIB3=4
  • DIB30=4
  • DIB31=4
  • DIB4=4
  • DIB5=4
  • DIB6=4
  • DIB7=4
  • DIB8=4
  • DIB9=4
  • DIPA0=4
  • DIPA1=4
  • DIPA2=4
  • DIPA3=4
  • DIPB0=4
  • DIPB1=4
  • DIPB2=4
  • DIPB3=4
  • DOA0=4
  • DOA1=4
  • DOA2=4
  • DOA3=4
  • DOA4=4
  • DOA5=4
  • DOA6=4
  • DOA7=4
  • DOB0=4
  • DOB1=4
  • DOB2=4
  • DOB3=4
  • DOB4=4
  • DOB5=4
  • DOB6=4
  • DOB7=4
  • ENA=4
  • ENB=4
  • REGCEA=4
  • REGCEB=4
  • RSTA=4
  • RSTB=4
  • WEA0=4
  • WEA1=4
  • WEA2=4
  • WEA3=4
  • WEB0=4
  • WEB1=4
  • WEB2=4
  • WEB3=4
REG_SR
  • CE=785
  • CK=1371
  • D=1371
  • Q=1371
  • SR=1043
SELMUX2_1
  • 0=124
  • 1=123
  • OUT=124
  • S0=124
SLICEL
  • A=39
  • A1=30
  • A2=59
  • A3=67
  • A4=77
  • A5=86
  • A6=92
  • AMUX=34
  • AQ=31
  • AX=25
  • B=71
  • B1=32
  • B2=79
  • B3=102
  • B4=109
  • B5=117
  • B6=120
  • BMUX=31
  • BQ=27
  • BX=21
  • C1=24
  • C2=38
  • C3=44
  • C4=129
  • C5=163
  • C6=167
  • CE=63
  • CIN=36
  • CLK=156
  • CMUX=44
  • COUT=36
  • CQ=140
  • CX=143
  • D=2
  • D1=53
  • D2=143
  • D3=147
  • D4=154
  • D5=165
  • D6=167
  • DMUX=36
  • DQ=64
  • DX=16
  • SR=146
SLICEM
  • A=39
  • A1=43
  • A2=45
  • A3=45
  • A4=45
  • A5=45
  • A6=45
  • AI=41
  • AMUX=32
  • AQ=7
  • AX=17
  • B=31
  • B1=32
  • B2=32
  • B3=32
  • B4=33
  • B5=35
  • B6=35
  • BI=32
  • BMUX=30
  • BQ=5
  • BX=16
  • C=31
  • C1=33
  • C2=33
  • C3=33
  • C4=33
  • C5=34
  • C6=33
  • CE=48
  • CI=32
  • CIN=1
  • CLK=48
  • CMUX=31
  • COUT=1
  • CQ=4
  • CX=17
  • D=22
  • D1=40
  • D2=40
  • D3=40
  • D4=40
  • D5=42
  • D6=42
  • DI=39
  • DMUX=36
  • DQ=5
  • DX=32
  • SR=4
SLICEX
  • A=188
  • A1=190
  • A2=251
  • A3=295
  • A4=332
  • A5=345
  • A6=344
  • AMUX=66
  • AQ=380
  • AX=200
  • B=151
  • B1=145
  • B2=192
  • B3=220
  • B4=240
  • B5=243
  • B6=246
  • BMUX=47
  • BQ=256
  • BX=132
  • C=105
  • C1=125
  • C2=159
  • C3=184
  • C4=196
  • C5=205
  • C6=206
  • CE=267
  • CLK=492
  • CMUX=38
  • CQ=232
  • CX=106
  • D=133
  • D1=120
  • D2=164
  • D3=189
  • D4=209
  • D5=222
  • D6=224
  • DMUX=41
  • DQ=220
  • DX=104
  • SR=369
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_compxlibgui 1 1 0 0 0 0 0
_impact 7 6 0 0 0 0 0
bitgen 16 16 0 0 0 0 0
bitinit 1 1 0 0 0 0 0
cse_server 1 1 0 0 0 0 0
edif2ngd 6 6 0 0 0 0 0
elfcheck 115 115 0 0 0 0 0
libgen 12 12 0 0 0 0 0
map 20 18 0 0 0 0 0
netgen 7 7 0 0 0 0 0
ngc2edif 8 8 0 0 0 0 0
ngcbuild 53 53 0 0 0 0 0
ngdbuild 20 20 0 0 0 0 0
obngc 4 4 0 0 0 0 0
par 18 18 0 0 0 0 0
partgen 29 27 0 0 0 0 0
platgen 11 11 0 0 0 0 0
psf2Edward 9 9 0 0 0 0 0
trce 17 17 0 0 0 0 0
xps 23 20 0 0 0 0 0
xpwr 2 2 0 0 0 0 0
xst 146 146 0 0 0 0 0
 
Core Statistics
Core Type=MicroBlaze
c_area_optimized=0 c_branch_target_cache_size=0 c_cache_byte_size=8192 c_d_axi=0
c_d_lmb=1 c_d_plb=1 c_dcache_always_used=0 c_dcache_baseaddr=0x00000000
c_dcache_byte_size=8192 c_dcache_data_width=0 c_dcache_force_tag_lutram=0 c_dcache_highaddr=0x3FFFFFFF
c_dcache_line_len=4 c_dcache_use_writeback=0 c_dcache_victims=0 c_debug_enabled=1
c_div_zero_exception=0 c_dplb_bus_exception=0 c_family=spartan6 c_fault_tolerant=0
c_fpu_exception=0 c_freq=66666666 c_fsl_exception=0 c_fsl_links=0
c_i_axi=0 c_i_lmb=1 c_i_plb=1 c_icache_always_used=0
c_icache_baseaddr=0x00000000 c_icache_data_width=0 c_icache_force_tag_lutram=0 c_icache_highaddr=0x3FFFFFFF
c_icache_line_len=4 c_icache_streams=0 c_icache_victims=0 c_ill_opcode_exception=0
c_instance=microblaze_0 c_interconnect=1 c_iplb_bus_exception=0 c_m_axi_d_bus_exception=0
c_m_axi_dc_data_width=32 c_m_axi_i_bus_exception=0 c_m_axi_ic_data_width=32 c_mmu_dtlb_size=4
c_mmu_itlb_size=2 c_mmu_tlb_access=3 c_mmu_zones=16 c_number_of_pc_brk=1
c_number_of_rd_addr_brk=0 c_number_of_wr_addr_brk=0 c_opcode_0x0_illegal=0 c_pvr=0
c_stream_interconnect=0 c_unaligned_exceptions=0 c_use_barrel=1 c_use_branch_target_cache=0
c_use_dcache=0 c_use_div=0 c_use_ext_brk=1 c_use_ext_nm_brk=1
c_use_extended_fsl_instr=0 c_use_fpu=0 c_use_hw_mul=1 c_use_icache=0
c_use_interrupt=0 c_use_mmu=0 c_use_msr_instr=1 c_use_pcmp_instr=1
mb_version=0x15
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_AND2B1L=1 NGDBUILD_NUM_BSCAN_SPARTAN6=1 NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_DSP48A1=3
NGDBUILD_NUM_FD=185 NGDBUILD_NUM_FDC=5 NGDBUILD_NUM_FDCE=31 NGDBUILD_NUM_FDC_1=5
NGDBUILD_NUM_FDE=360 NGDBUILD_NUM_FDE_1=8 NGDBUILD_NUM_FDP=5 NGDBUILD_NUM_FDR=959
NGDBUILD_NUM_FDRE=653 NGDBUILD_NUM_FDRE_1=1 NGDBUILD_NUM_FDS=34 NGDBUILD_NUM_FDSE=47
NGDBUILD_NUM_GND=13 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_INV=34 NGDBUILD_NUM_LUT1=43
NGDBUILD_NUM_LUT2=144 NGDBUILD_NUM_LUT3=472 NGDBUILD_NUM_LUT4=354 NGDBUILD_NUM_LUT5=408
NGDBUILD_NUM_LUT6=639 NGDBUILD_NUM_LUT6_2=79 NGDBUILD_NUM_MULT_AND=2 NGDBUILD_NUM_MUXCY=80
NGDBUILD_NUM_MUXCY_L=164 NGDBUILD_NUM_MUXF7=124 NGDBUILD_NUM_OBUF=9 NGDBUILD_NUM_PLL_ADV=1
NGDBUILD_NUM_RAM32M=16 NGDBUILD_NUM_RAMB16BWER=4 NGDBUILD_NUM_SRL16=1 NGDBUILD_NUM_SRL16E=32
NGDBUILD_NUM_SRLC16E=106 NGDBUILD_NUM_VCC=8 NGDBUILD_NUM_XORCY=129
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_AND2B1L=1 NGDBUILD_NUM_BSCAN_SPARTAN6=1 NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_DSP48A1=3
NGDBUILD_NUM_FD=185 NGDBUILD_NUM_FDC=5 NGDBUILD_NUM_FDCE=31 NGDBUILD_NUM_FDC_1=5
NGDBUILD_NUM_FDE=360 NGDBUILD_NUM_FDE_1=8 NGDBUILD_NUM_FDP=5 NGDBUILD_NUM_FDR=959
NGDBUILD_NUM_FDRE=653 NGDBUILD_NUM_FDRE_1=1 NGDBUILD_NUM_FDS=34 NGDBUILD_NUM_FDSE=47
NGDBUILD_NUM_GND=13 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_INV=34 NGDBUILD_NUM_LUT1=43
NGDBUILD_NUM_LUT2=144 NGDBUILD_NUM_LUT3=472 NGDBUILD_NUM_LUT4=354 NGDBUILD_NUM_LUT5=408
NGDBUILD_NUM_LUT6=639 NGDBUILD_NUM_LUT6_2=79 NGDBUILD_NUM_MULT_AND=2 NGDBUILD_NUM_MUXCY=80
NGDBUILD_NUM_MUXCY_L=164 NGDBUILD_NUM_MUXF7=124 NGDBUILD_NUM_OBUF=9 NGDBUILD_NUM_PLL_ADV=1
NGDBUILD_NUM_RAM32M=16 NGDBUILD_NUM_RAMB16BWER=4 NGDBUILD_NUM_SRL16E=33 NGDBUILD_NUM_SRLC16E=106
NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=8 NGDBUILD_NUM_XORCY=129
 
XST Command Line Options
XST_OPTION_SUMMARY
-opt_mode=speed -netlist_hierarchy=as_optimized -opt_level=1 -p=xc6slx9tqg144-2
-top=<design_top> -ifmt=MIXED -ifn=<fname>.prj -ofn=<design_top>
-iobuf=YES -max_fanout=10000 -sd=<No customer specific name> -vlgincdir={"G:\Work\FPGA_CD\chapt7\exp7_2\pcores\" "G:\Software\ISE_DS\EDK\hw\XilinxBFMinterface\pcores\" "G:\Software\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\" }